Inkjet print head with shared data lines

ABSTRACT

An inkjet print head includes data signal lines configured to supply inkjet control voltages and non-volatile memory cell random access addresses. The inkjet print head includes an inkjet nozzle array wherein each nozzle in the array is configured to communicate with a data signal line. Also a non-volatile attribute memory cell array is included in the inkjet print head wherein each memory cell in the array is accessed through a data signal line shared with the nozzle array.

BACKGROUND

One of the areas of continued progress of inkjet printing is that ofprint heads. Development is ongoing and is working towards improvedprint speeds, quality and resolution, versatility in handling differentink bases and viscosity, robustness of the print heads for industrialapplications, and improved width of printing swathes. Manufacturers havereduced printer prices by incorporating much of the actual print headinto the cartridge itself. The manufacturers believe that since theprint head is the part of the printer that is most likely to wear out,replacing it every time the cartridge is replaced can increase the lifeof the printer.

Modern inkjet printing is performed with a self-contained print headthat includes an ink reservoir, complete with inkwell, sprayingmechanism, and nozzles that can be controlled accurately. An inkjetprint head may contain nozzles or orifices for the ejection of printingfluid onto a printing medium. Nozzles are typically arranged in one ormore arrays such that characters or images may be printed on a mediummoving relative to the nozzle array. Print head attributes that maydetermine print head performance include ink drop volume, pen types, inktypes, and column to column nozzle spacing. Data representing the inkjetattributes is stored with the print head and can be read by the inkjetprinter during initialization.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 depicts elements of an inkjet print head in accordance with anembodiment;

FIG. 2 depicts an embodiment of a method for using an inkjet print headhaving a nozzle array and a corresponding non-volatile memory cellarray; and

FIG. 3 depicts an embodiment of a method of making an inkjet print headin a single process technology.

DETAILED DESCRIPTION

In describing embodiments of the present invention, the followingterminology will be used.

The singular forms “a,” “an,” and “the” include plural referents unlessthe context clearly dictates otherwise. Thus, for example, reference to“a device” includes reference to one or more of such devices.

As used herein, array parameters, shapes and other quantities andcharacteristics are not and need not be exact, but may be approximatedand/or larger or smaller, as desired, reflecting process tolerances,conversion factors, rounding off, measurement error and the like andother factors known to those of skill in the art.

Reference will now be made to the exemplary embodiments illustrated, andspecific language will be used herein to describe the same. It willnevertheless be understood that no limitation of the scope of theinvention is thereby intended.

FIG. 1 illustrates an inkjet print head that includes a plurality ofdata signal lines 110 configured to supply inkjet control voltages to anozzle array and to supply random access addresses to a non-volatilememory cell array. As a result, extra data signal lines are not neededfor the memory cell array. The memory cell array may be used to storeprint head attributes such as column to column spacing, ink types, pentypes, drop volume, ink availability, and other like attributes.

The fabrication of non-volatile memory cells typically uses in excess of14 to 16 masks but the fabrication of a nozzle array may require fewerthan half as many masks. Developing a process technology to fabricateboth the nozzle array and the non-volatile memory array together in asingle print head can be cost prohibitive. Additionally, where thenozzle array and the memory array are fabricated separately, providinginterconnects between the two arrays increases costs in manufacturingand debugging.

Print heads which have devices that use fuses to store attributesrequire large silicon areas which may easily be visually examined toreverse engineer attribute data for cloning. The present disclosureinhibits cloning of print head attribute data by storing attribute datain non-volatile memory cells fabricated onto the same chip as the printhead in a single fabrication technology with the nozzle arrays.Attribute data stored into non-volatile memory cells is less likely tobe visually reverse engineered since the information is storedelectronically on floating gates.

The inkjet nozzle array 120 includes a plurality of nozzles wherein eachnozzle in the array is configured to communicate with a data signal line110 which may control the nozzle through variable voltages. Thenon-volatile memory cell array 140 includes a plurality of memory cellswherein each memory cell in the array is accessed through the datasignal line shared with the nozzle array. The non-volatile memory cellcan be an EPROM (Electrically Programmable Read Only Memory), Flashmemory or another type of non-volatile memory.

Only non-volatile memory cells of a chosen polarity need be programmedor written. Where a logical ‘1’ is the chosen polarity of a programmedmemory cell, logical ‘0’ cells may remain unwritten. Thus only anaddress need be present at the memory cell array in order to write datato a non-volatile memory cell.

In an embodiment, an inkjet print head may further comprise a data toaddress converter 130 configured to convert data on a data signal lineinto a random access address on multiple random address lines 150labeled ‘Address 1’, through ‘Address n+1’ in FIG. 1. A random accessaddress, as opposed to a sequential access address, allows access to amemory cell independent of the cell access prior to or following theaccess of the cell at the random access address.

The data to address converter may further comprise a shift registerconfigured to receive data from a data signal line connected to an inputdata pin. The data can be used for addressing the non-volatile attributearray. A data signal line may exist for every bit latched in the shiftregister. Every bit latched in the shift register becomes an address bitthat may be applied to the memory array.

To improve efficiency, a second shift register may be configured in anembodiment to receive data from a second data signal line connected to asecond input data pin to enable addressing a second portion of thenon-volatile attribute array. The more shift registers used in anembodiment, the less shifting of data is required to program the shiftregister and thus the converter becomes more efficient. In an alternateembodiment, the data to address converter may comprise transistor logicconfigured to generate a plurality of random access address lines. Asingle data line may generate two address lines by using Boolean trueand complement line generation. Two address lines may generate fouraddress lines by all possible combinations of the Boolean true andcomplement of the two address lines. Therefore, 2 ^(N) possible addresslines may be generated where N is equal to the number of data linesentering the data to address converter.

In other embodiments, the non-volatile attribute memory cell array mayfurther comprise 64 cells to 128 cells. An array may also be split intoseveral physically discrete though logically adjacent smaller arrays toutilize existing space in the print head silicon. Arrays may berectangular or square to fit die space requirements. One result of thepresent disclosure is that non-volatile memory arrays may be added tothe print head without any increase in silicon area above that neededfor the nozzle arrays and print head control.

Programming voltages may be generated off the print head and readcurrents may be sensed off the print head. Thus, support circuitry maybe minimized for the memory cell array. Furthermore, the arrays arescalable to a larger number of memory cells by adding address lines forfuture advanced implementations.

An embodiment of the array may include multiple columns of NMOS(N-channel Metal Oxide Semiconductor) devices in series with anon-volatile n-channel memory device. Therefore, an inkjet print headmay include only active devices characterized as NMOS devices with noPMOS (P-channel Metal Oxide Semiconductor) devices at all. Additionally,the non-volatile attribute memory cell array may include a covering overeach attribute memory cell configured to prevent ultraviolet lighterasure of the data stored on the non-volatile memory cell. However,erasure and programming of the array may be possible at wafer-sort priorto application of the cover.

A method of using an inkjet print head having a nozzle array and acorresponding attribute non-volatile memory cell array will now bediscussed. The method may include accessing a nozzle in the nozzle arraythrough a data signal line as in step 210 depicted in FIG. 2. Data onthe data signal line can be converted into a random access address as instep 220. Memory cells in the attribute memory array can be addressedthrough the random access address, as in step 230. A read or a write ofthe memory cell is performed as in step 240. The data signal line usedto control a nozzle in the nozzle array is the same data signal lineused to address a memory cell after the conversion of data to a randomaccess address. One embodiment for sharing the data signal line betweenthe nozzle array and the memory array includes latching data signalsinto a shift register wherein each latched signal has a correspondingsignal line. The data signal lines from the shift register are appliedto the memory cell array to access a memory cell at random for either aread or a write. Thus, the shift register effectively converts incomingdata into a random access address. No data is necessary to address thenonvolatile memory array since the memory cell array only needs anaddress to program a binary ‘1’ or a ‘0’.

An attribute memory cell can be read by sensing a voltage or a currentfrom a column in the memory cell array associated with a memory cell onthat column at a row address. Likewise an embodiment for writing anattribute memory cell includes driving a variable voltage pulse and avariable current source into a column associated with a data signal lineand a memory cell. Reading and writing a memory cell may be done usingsupport circuitry located on or off the print head.

A method of making an inkjet print head in a single process technologyis depicted in FIG. 3. Masks are generated wherein each mask maycomprise inkjet nozzle geometries and non-volatile memory cellgeometries on a single layer in the process technology as in step 310. Asubstrate support is provided as in step 320 for the fabrication ofmultiple inkjet print heads as may be stepped on a single semiconductorwafer. A substrate may be cut from a silicon ingot, a glassy material,formed from a plastic, or a fabric material. Substrates provide asubstantially flat surface on which to form the active semiconductordevices. The substrates used can be electrically non-conductive or mayinclude an electrically non-conductive layer and may vary in thicknessdepending on the mechanical strength needed and the cost targeted inmanufacturing. Semiconductor layers, conductor layers, associated viasand contacts can be fabricated onto the substrate as in step 330 usingthe masks in a photolithographic process.

An embodiment of a method of making an inkjet print head may furtherinclude generating masks having data signal lines shared between anozzle array and a memory cell array. Since the fabrication technologyfor the non-volatile memory array has been optimized to the masksrequired for the nozzle array, fewer than 10 masks may be all that areneeded to fabricate the memory cell array. A single process technologymay include fabricating the semiconductor and conductor layers from asingle master set of photolithographic masks configured to produce atleast one complete print head.

It is to be understood that the above-referenced arrangements are onlyillustrative of the application for the principles of the presentinvention. Numerous modifications and alternative arrangements can bedevised without departing from the spirit and scope of the presentinvention. While the present invention has been shown in the drawingsand fully described above with particularity and detail in connectionwith what is presently deemed to be the most practical and preferredembodiment(s) of the invention, it will be apparent to those of ordinaryskill in the art that numerous modifications can be made withoutdeparting from the principles and concepts of the invention as set forthherein.

1. An inkjet print head, comprising: a plurality of data signal linesconfigured to supply inkjet control voltages and non-volatile memorycell random access addresses; an inkjet nozzle array having a pluralityof nozzles wherein each nozzle in the array is configured to communicatewith a data signal line from the plurality of data signal lines; and anon-volatile attribute memory cell array wherein each memory cell in thearray is accessed through a data signal line from the plurality of datasignal lines shared with the nozzle array.
 2. An inkjet print head as inclaim 1, further comprising a data to address converter configured toconvert data from a data signal line into a random access address on aplurality of random access address lines.
 3. An inkjet print head as inclaim 2, wherein the data to address converter further comprises: afirst shift register configured to receive data from a first input datapin for a first data signal line and to address a portion of thenon-volatile attribute array; and a second shift register configured toreceive data from a second input data pin for a second data signal lineand to address a remaining portion of the non-volatile attribute array.4. An inkjet print head as in claim 2, wherein the data to addressconverter further comprises transistor logic configured to generate aplurality of random access address signals.
 5. An inkjet print head asin claim 1, wherein the non-volatile attribute memory cell array furthercomprises 64 cells to 128 cells.
 6. An inkjet print head as in claim 1,wherein the non-volatile attribute memory cell array further comprisesmultiple columns of n-channel devices in series with a non-volatilen-channel memory device.
 7. An inkjet print head as in claim 1, whereinthe non-volatile attribute memory cell array further comprises a coverover the non-volatile attribute memory cell array configured to preventultraviolet light erasure of the data stored on the non-volatile memorycell.
 8. An inkjet print head as in claim 1, wherein the non-volatilememory cells are configured to store inkjet data attributes selectedfrom the group consisting of column to column spacing, ink types, pentypes, drop volume, and ink availability.
 9. A method of using an inkjetprint head having a nozzle array and a corresponding attributenon-volatile memory cell array, comprising: accessing a nozzle in thenozzle array through a data signal line; converting data on the datasignal line into a random access address; addressing a memory cell inthe attribute memory array through the random access address; andperforming one of a read and a write of the memory cell using randomaccess addresses converted from the data signal line.
 10. A method ofusing an inkjet print head as in 9, wherein converting data on the datasignal line into a random access address further comprises: latching aplurality of data signals into a shift register wherein each latchedsignal has a corresponding data signal line; applying data from theplurality of data signal lines as converted by the shift register to thememory cell array; and reading an attribute memory cell in the memorycell array at a random access address defined by the data signal lines.11. A method of using an inkjet print head as in claim 9, whereinconverting data on the data signal line into a random access addressfurther comprises: latching a plurality of data signals into a shiftregister wherein each latched signal has a corresponding data signalline; applying data from the plurality of data signal lines as convertedby the shift register to the memory cell array; and writing an attributememory cell in the memory cell array at a random access address definedby the data signal lines.
 12. A method of using an inkjet print head asin claim 10, wherein reading an attribute memory cell further comprisessensing one of a voltage and a current of a column in the memory cellarray associated with a random access address of a memory cell.
 13. Amethod of using an inkjet print head as in claim 11, wherein writing anattribute memory cell further comprises driving a variable voltage pulseand a variable current source into a column associated with a datasignal line and a memory cell.
 14. A method of making an inkjet printhead in a single process technology, comprising: generating a pluralityof masks wherein each mask comprises inkjet nozzle geometries andnon-volatile memory cell geometries on a single layer in the processtechnology; providing a substrate support for a plurality of inkjetprint heads; and fabricating semiconductor layers, conductor layers,vias and contacts onto the substrate using the plurality of masks in aphotolithographic process.
 15. A method of making an inkjet print headas in claim 14, further comprising providing a plurality of masks havingdata signal lines shared between a nozzle array and a memory cell array.16. A method of making an inkjet print head as in claim 14, furthercomprising providing a plurality of masks less than or equal to 10 inquantity.
 17. A method of making an inkjet print head as in claim 14,further comprising providing a substrate selected from the groupconsisting of silicon, plastic, fabric, and composites thereof.
 18. Amethod of making an inkjet print head as in claim 14, further comprisingfabricating the semiconductor and conductor layers from a single masterset of photolithographic masks configured to produce at least onecomplete print head.
 19. An inkjet print head, comprising: a pluralityof data signal means for supplying inkjet control voltages andnon-volatile memory cell random access addresses; an inkjet nozzle arraymeans having a plurality of nozzles for delivering ink onto a medium,wherein each nozzle in the array means communicates with a data signalmeans from the plurality of data signal means; and a non-volatileattribute memory cell array means for storing print head identificationdata, wherein each memory cell in the array communicates through a datasignal means from the plurality of data signal means shared with thenozzle array means.
 20. An inkjet print head as in claim 1, furthercomprising a data to address converter means for converting data from adata signal line into a random access address on a plurality of randomaccess address lines.